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Espressif Systems /ESP32-C6 /LP_I2C0 /I2C_SR

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Interpret as I2C_SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (I2C_RESP_REC)I2C_RESP_REC 0 (I2C_ARB_LOST)I2C_ARB_LOST 0 (I2C_BUS_BUSY)I2C_BUS_BUSY 0I2C_RXFIFO_CNT 0I2C_TXFIFO_CNT 0I2C_SCL_MAIN_STATE_LAST 0I2C_SCL_STATE_LAST

Description

Describe I2C work status.

Fields

I2C_RESP_REC

The received ACK value in master mode or slave mode. 0: ACK, 1: NACK.
I2C_ARB_LOST

When the I2C controller loses control of SCL line, this register changes to 1.
I2C_BUS_BUSY

1: the I2C bus is busy transferring data, 0: the I2C bus is in idle state.
I2C_RXFIFO_CNT

This field represents the amount of data needed to be sent.
I2C_TXFIFO_CNT

This field stores the amount of received data in RAM.
I2C_SCL_MAIN_STATE_LAST

This field indicates the states of the I2C module state machine. 0: Idle, 1: Address shift, 2: ACK address, 3: Rx data, 4: Tx data, 5: Send ACK, 6: Wait ACK
I2C_SCL_STATE_LAST

This field indicates the states of the state machine used to produce SCL. 0: Idle, 1: Start, 2: Negative edge, 3: Low, 4: Positive edge, 5: High, 6: Stop

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data